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01: #ifndef __HDLC_IOCTL_H__
02: #define __HDLC_IOCTL_H__
03: 
04: 
05: #define GENERIC_HDLC_VERSION 4  /* For synchronization with sethdlc utility */
06: 
07: #define CLOCK_DEFAULT   0       /* Default setting */
08: #define CLOCK_EXT       1       /* External TX and RX clock - DTE */
09: #define CLOCK_INT       2       /* Internal TX and RX clock - DCE */
10: #define CLOCK_TXINT     3       /* Internal TX and external RX clock */
11: #define CLOCK_TXFROMRX  4       /* TX clock derived from external RX clock */
12: 
13: 
14: #define ENCODING_DEFAULT        0 /* Default setting */
15: #define ENCODING_NRZ            1
16: #define ENCODING_NRZI           2
17: #define ENCODING_FM_MARK        3
18: #define ENCODING_FM_SPACE       4
19: #define ENCODING_MANCHESTER     5
20: 
21: 
22: #define PARITY_DEFAULT          0 /* Default setting */
23: #define PARITY_NONE             1 /* No parity */
24: #define PARITY_CRC16_PR0        2 /* CRC16, initial value 0x0000 */
25: #define PARITY_CRC16_PR1        3 /* CRC16, initial value 0xFFFF */
26: #define PARITY_CRC16_PR0_CCITT  4 /* CRC16, initial 0x0000, ITU-T version */
27: #define PARITY_CRC16_PR1_CCITT  5 /* CRC16, initial 0xFFFF, ITU-T version */
28: #define PARITY_CRC32_PR0_CCITT  6 /* CRC32, initial value 0x00000000 */
29: #define PARITY_CRC32_PR1_CCITT  7 /* CRC32, initial value 0xFFFFFFFF */
30: 
31: #define LMI_DEFAULT             0 /* Default setting */
32: #define LMI_NONE                1 /* No LMI, all PVCs are static */
33: #define LMI_ANSI                2 /* ANSI Annex D */
34: #define LMI_CCITT               3 /* ITU-T Annex A */
35: #define LMI_CISCO               4 /* The "original" LMI, aka Gang of Four */
36: 
37: typedef struct { 
38:         unsigned int clock_rate; /* bits per second */
39:         unsigned int clock_type; /* internal, external, TX-internal etc. */
40:         unsigned short loopback;
41: } sync_serial_settings;          /* V.35, V.24, X.21 */
42: 
43: typedef struct { 
44:         unsigned int clock_rate; /* bits per second */
45:         unsigned int clock_type; /* internal, external, TX-internal etc. */
46:         unsigned short loopback;
47:         unsigned int slot_map;
48: } te1_settings;                  /* T1, E1 */
49: 
50: typedef struct {
51:         unsigned short encoding;
52:         unsigned short parity;
53: } raw_hdlc_proto;
54: 
55: typedef struct {
56:         unsigned int t391;
57:         unsigned int t392;
58:         unsigned int n391;
59:         unsigned int n392;
60:         unsigned int n393;
61:         unsigned short lmi;
62:         unsigned short dce; /* 1 for DCE (network side) operation */
63: } fr_proto;
64: 
65: typedef struct {
66:         unsigned int dlci;
67: } fr_proto_pvc;          /* for creating/deleting FR PVCs */
68: 
69: typedef struct {
70:         unsigned int dlci;
71:         char master[IFNAMSIZ];  /* Name of master FRAD device */
72: }fr_proto_pvc_info;             /* for returning PVC information only */
73: 
74: typedef struct {
75:     unsigned int interval;
76:     unsigned int timeout;
77: } cisco_proto;
78: 
79: /* PPP doesn't need any info now - supply length = 0 to ioctl */
80: 
81: #endif /* __HDLC_IOCTL_H__ */
82: 

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